Annex N (informative) — Expanders and inter-module links

How to describe and build the connections modules make with each other behind the panel: expander headers and digital links such as I²C. EIS places one requirement on them, BUS-011 in 6.4: a header that is not the power header either does not mate a Eurorack power ribbon socket or survives one fitted to it. Everything else here is recommended practice.

EIS · An expander header beside the power header power header, 2 × 5 expander, 2 × 5, same key a power ribbon fits expander, 2 × 4 a power ribbon does not fit expander, 2 × 6, unshrouded fits only if it survives ±12 V A header that is not the power header either does not mate a power ribbon socket or survives one fitted to it, either way round (BUS-011). A different pin count, a different key, or another connector family meets the first; protection on every pin meets the second. Annex N lists expanders and digital links on the port list as unclassified, named by what they connect to.

N.1 Expanders

An expander is a second module that adds jacks, controls, or memory to a main module through a short cable behind the panel. The signals on that cable are private to the maker, so EIS does not classify them.

Topic Practice
Port list List the expander header as a port, unclassified, named for what it connects to, for example EXPANDER (to main module)
Connector A pin count or connector family that a power ribbon does not fit, or a shrouded header keyed against it; the label on the board says what the header is
Cable Supplied with the expander, keyed, and long enough to reach the neighboring HP positions it is meant for, typically 100 mm to 150 mm
Power The expander takes power from its own power header or through the main module, as its manual states; its currents are published either way (PWR-001)
Placement The manual states where the expander may sit relative to the main module: adjacent, same row, or any row the cable reaches

Several module families share an I²C bus between modules, usually on a 3-pin header carrying SDA, SCL, and 0 V. I²C is defined by its own specification (NXP UM10204); EIS recommends the following so that modules from different makers can share one bus.

Topic Practice
Logic level 3.3 V logic, with inputs that tolerate 5 V
Pull-ups Only the products that say so fit pull-ups; the manual states their value and whether they can be switched off
Bus loading The total bus capacitance stays within the I²C limit of 400 pF; a bus that spans more than one row or more than about 1 m of cable is a design to check, not a default
Addresses and roles The manual lists each address the module answers and whether it acts as controller or target
Header Pin order SDA, SCL, 0 V is common but not universal; the board marks each pin

A link header is listed on the port list like an expander header, unclassified, named by its function, for example I2C.

A cable that carries analog signals between modules behind the panel, such as a normalled bus or a chained clock, joins the 0 V of the modules it links (6.3). EIS recommends listing it on the port list with the class its signals would have on a patch jack, so that its levels are known.