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tbc2 beta program

243p genlock, SD fastest-framerate upscale, ADV7181C input expansion

Active RC: 1.1.0-rc.2

Before you test

  • TBC2 MK2 hardware (gen3 / Zynq-based)
  • Firmware 1.1.0-rc.2 installed — confirm on the System page
  • 243p60.04 video source (LZX module or ESG3 C_240P sync) for genlock/upscale tests
  • Waveform monitor or oscilloscope (optional but recommended for sync rate checks)

Testing goals

  • 243p60.04 as genlock output (16th format)

    high

    On the System page, select **243p60.04** as the Genlock standard. Confirm sync output is present on front/rear sync jacks. If ESG3 is available, set ESG3 to 243p/240P sync and connect external sync to TBC2 — confirm TBC2 locks and reports 243p60.04 (not NTSC).

    Pass: - 243p60.04 appears in Genlock standard picker - Internal 243p sync output locks cleanly (green external-sync LED when fed back) - External ESG3 243p locks as 243p60.04, not NTSC - VSYNC rate ~60 Hz (not ~30 Hz) on scope

  • ADV7181C 243p60.04 input detection

    high

    Feed a 243p60.04 signal (720×243 progressive) into Decoder A or B via CVBS or S-Video. Confirm the Decoder page reports input standard 243p60.04.

    Pass: - Input locks and reports 243p60.04 - Preview shows correct image (no vertical displacement)

  • 243p → 720p60 upscaling at full frame rate

    high

    With 243p60.04 input, set Genlock/output to 720p60. Use a moving test pattern (counter, rotating bar, or live camera motion). Cycle Stretch / Crop / Fit scaler modes.

    Pass: - Output fills 1280×720 (aspect modes behave correctly) - Motion is smooth at ~60 fps — no 2:1 frame stutter or half-rate cadence - No periodic vertical glitch or buffer stall

  • 243p → 720p59 upscaling

    high

    Repeat upscale test with Genlock set to 720p59.

    Pass: - Same as 720p60 — smooth motion, no half-rate drop

  • 243p → 480p59 upscaling

    high

    Set Genlock to 480p59 with 243p input. Confirm vertical upscale to 483 lines.

    Pass: - Image scales to 720×483 output - Motion at full ~60 fps

  • NTSC external genlock regression

    medium

    Feed standard NTSC (486i59) external sync. Confirm TBC2 locks as NTSC, not 243p60.04.

    Pass: - External NTSC locks as NTSC 486i59 - No regression in NTSC decode or output

  • NTSC → 720p60 field-rate upscale

    high

    Feed NTSC (486i59) into a decoder. Set Genlock to 720p60. Use moving video; confirm smooth ~60 fps motion (not 30 fps stutter).

    Pass: - Output motion at field rate (~60 fps), not half-rate frame repeat

  • PAL → 576p50 field-rate upscale

    high

    Feed PAL into a decoder. Set Genlock to 576p50. Confirm smooth 50 fps motion.

    Pass: - Vertical fill to 576 lines; 50 fps motion

  • ADV7181C 288p50 input detection

    medium

    Feed 288p50 (720×288 progressive, PAL region) via CVBS/S-Video. Confirm Decoder reports 288p50. Upscale to 576p50 or 720p50.

    Pass: - Input locks as 288p50 - 288p50 is not available in Genlock output picker - Upscale to 576p50/720p50 at full 50 fps

  • 480i → 720p60 field-rate upscale

    high

    Feed 480i59 component (YPbPr) into a decoder. Set Genlock to 720p60. Confirm input reports 480i59 (not NTSC). Check smooth ~60 fps motion.

    Pass: - Input standard 480i59 - Field-rate upscale without half-rate stutter

  • 1080i → 1080p30 interpolation

    medium

    Feed 1080i60 component. Set Genlock to 1080p30. Confirm full progressive output.

    Pass: - No interlaced DMA artifacting; smooth 30 fps output

  • ADV7181C 1080psf23/24 input detection

    medium

    Feed 1080psf23 or 1080psf24 component (YPbPr). Confirm Decoder reports 1080psf2398 or 1080psf24 (not 1080i or 1080p24).

    Pass: - Input locks as 1080psf23 or 1080psf24 - Progressive film-rate output when genlock matched to input rate

  • Reliability and housekeeping

    medium

    - Restart the module and confirm settings persist. - Check the System page shows version 1.1.0-rc.2. - Note any hangs, glitches, or unexpected behaviour during 243p testing.

    Pass: - Settings persist across normal restart - System page shows 1.1.0-rc.2

Known issues

  • ESG3 DIP table may not expose 243p publicly — Use ESG3 firmware C_240P timing source or direct 243p module output

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